With some VGA cards, if the video shadow is disabled, then the 80486 25MHz system gives DMA error

 American Megatrends, Inc.

Tech Tip #98.005

01/21/91


Problem:


With some VGA cards, if the video shadow is disabled, then the

80486 25MHz system gives DMA errors.



Solution:


This problem is because of the B Step 80486 CPU, C0 stepping 25MHz

CPU's are not yet available.

Consider the following facts:

- Whenever 80486 does a code fetch, it always accesses 16 bytes.

- On an IBM AT compatible motherboard, the time taken to complete

  a 8 bit I/O cycle is about 1us.

- On an IBM AT compatible motherboard, the time taken to complete

  a 16 bit I/O cycle is about 500ns.


Case 1:


VGA BIOS 8 bit

VGA Shadow Disabled


In this case if the CPU starts a code fetch from the VGA BIOS, it 

will take 16 X 1us = 16us, during this access, the CPU will not 

accept any DMA requests.

For a device like the floppy drive, the maximum time allowed before

a DMA request must be achnowledged, is about 14us.

So in this case, the system will generate a DMA error.


Case2:


VGA BIOS 16 bit

VGA Shadow Disabled


In the case the time required to complete the CPU code fetch to

the VGA BIOS will be 8 X 500ns = 4us, during this access, the CPU

will not accept any DMA requests.

Therefore in this case you should not have any problems.


- Enabling video shadow with 8/16 bit VGA BIOS results in a much

  faster access, since the CPU's access is redirected to the system

  RAM, an the entire 128 bit fetch may be completed within 500ns.

- To use a VGA card with 8 bit BIOS, you will have to enable the

  video shadow.

- In Voyager, you will not be able to relocate the 256K area used

  for video shadow, 384K memory is always reserved.  So by enabling

  video shadow you do not loose any system resources.


In the C stepping of 80486 CPU, Intel has added to following

features to resolve this problem:


- If the CPU access is to a memory area that is nonburst/non

  cacheable, in the 80486 internal cache, then, the CPU will

  acknowledge a DMA request every 4 cycles.  This will provide

  a maximum latency of about 4us.

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